The present invention relates to a method for forming a metal or a metal silicide film, and more particularly to a method of forming a metal or metal silicide film for electrode and interconnects of a semiconductor device through CVD.
A three dimensional structure of a semiconductor device element has been formed for the purpose of LSI. This requires a reliable multilevel metallization technique capable of coping with abrupt steps and, capable of coping with small and deep contacts as well. Under these circumstances, there has been active research and development in recent years regarding the techniques for forming metal and metal silicide films through CVD. Among the above-described techniques for forming a thin film through CVD, studies have been made on blanket W-CVD wherein metal and metal silicide films are deposited on the whole surface of a semiconductor substrate and selective W-CVD wherein metal silicide films are deposited only on the surface of a conductor, such as silicon, without deposition of the film on an insulating film. The blanket W-CVD has been studied mainly as a method of forming a thin film for electrode and interconnects, while the selective W-CVD has been studied mainly as a technique of filling for contacts and vias.
A selective W-CVD process widely known in the art comprises selectively depositing tungsten and molybdenum on silicon and a metal through the use of metal halides, such as WF.sub.6 and MoF.sub.6, and reducing gases, such as hydrogen and SiH.sub.4. For example, U.S. Pat. No. 3,697,343 discloses a selective W-CVD process wherein WF.sub.6 and hydrogen are used.
Japanese Patent Laid-Open No. 72132/1984 discloses selective W-CVD wherein WF.sub.6 and SiH.sub.4 are used. In this process, a sufficient deposition rate can be obtained at a temperature as low as 300.degree. C., the surface morphology is very smooth and defects to the tungsten/silicon interface can be prevented because silicon is supplied from SiH.sub.4 to reduce WF.sub.6.